antenna efficiency, and a reduction of the frequency of operation of the inductors. A viable solution recently investigated towards this integration is the formation of a local substrate with the appropriate dielectric properties on the Si wafer, on which the RF and millimeter-wave devices will be integrated. Such a substrate is a thick porous Si layer with high porosity, which can be optimized for best device performance by choosing the appropriate layer thickness, in order to minimize electromagnetic propagation losses into Si, and the appropriate low values of the dielectric permittivity, ε r , and loss tangent. These last values are tunable by changing the material structure and morphology [1–6]. Porous Si structure (pore size, inter-pore distance) and morphology affect all its macroscopic properties (electrical, mechanical, optical, etc.) . An intensive effort was made in the literature to correlate the electrical properties of the material with its structural parameters [8–12]. In view of the application of porous Si for the on-chip integration Selleckchem CA-4948 of RF and millimeter-wave devices, its dielectric properties (dielectric permittivity and loss tangent) as a function of frequency
should be known, in order to be used by the device designer for an accurate Sitaxentan prediction of device operation. In addition, since the dielectric properties of the material depend strongly on its structure and morphology , it is desirable to have an experimental method to extract the dielectric parameters of the specific material used in each application. In this work, we will first discuss the existing models that correlate the structural properties of porous Si (porosity and morphology) with its dielectric properties and we will compare them with results obtained by a broadband extraction method, based on the measurement of the S-parameters of coplanar waveguide
transmission lines (CPW TLines) integrated on the porous Si substrate. By combining these measurements with electromagnetic simulations, the dielectric permittivity and loss tangent of the substrate (porous Si) can be obtained. This method has been previously used by the authors to extract the dielectric parameters of porous Si in the frequency range 1 to 40 GHz [13, 14]. In this work, measurements are extended to the frequency range 140 to 210 GHz. Finally, by comparing the performance of CPW TLines on porous Si and three other substrates used in RF, namely, a trap-rich high-resistivity (HR) Si substrate [15–17], a standard CMOS Si wafer (p-type, resistivity 1 to 10 Ω.cm), and a quartz substrate, we demonstrate the superiority of porous Si as a local substrate for RF and millimeter-wave on-chip device integration.